PoE: Extended Power Matthias Wendt, Lennart Yseboodt Philips Research September 2014 PoDL for Lighting Philips Research, June 15, 2014 2 September 2014 Philips Research The Philips Lighting view on PoDL Why we like PoE so much for future lighting systems and why we are hesitant embracing PoDL: – What is so attractive in PoE for Lighting – How do these points change with single pair Ethernet and PoDL – Opportunities and threats Philips Research, June 15, 2014 3 September 2014 Philips Research What was so attractive in PoE for Lighting • At 802.3at power levels many LED based lighting applications became feasible • A huge market of available PSEs of various port count and power levels • RJ45 well known world-wide • Low cost high quality pre-manufactured cables available • Installation for IT in buildings is common practice • Cabling in the ceilings without conduits allowed in US building codes • Integration with IP data connectivity inline with trend towards smart lighting systems and building automation Philips Research, June 15, 2014 4 September 2014 Philips Research How do these points change with single pair Ethernet and PoDL • Industry eco system: huge, engineered systems are dominating, power is integral part dominated by automotive  will need to start for building • Building codes: single pair PoDL is unknown, higher power beyond UL class 2 may lead to conduit base wiring requirements • Cables: optimized for power: may offer even higher power beyond UL class 2, no heating problem, low losses no pre-manufactured cable market  all automotive cable harness is engineered • Connectors: optimized for power will offer high longevity, reliability at long unchanged installations, polarity aware installations unknown connectors, no building optimized connectors out, market development unclear Philips Research, June 15, 2014 5 September 2014 Philips Research Opportunities and threats For Lighting systems efficient power transport, dependability and longevity are crucial  an automotive focused standard optimized for this will on the long run also enter Buildings PoDL may support other wiring topologies than star-net  Busses and Daisy-Chaining are common wiring topologies for modern lighting installations.

Thus during BYPASS and SAMPLE, it is possible to have the AB busses connected to pins.

Memory busses (to my knowledge) usually carry a number of bits that is a power of two.

Stateless 64b/66b Encode/Decode • As port speeds get faster: • Internal busses must get wider as it is harder to increase the ASIC clock frequency • For Stateful 64b/66b coding, each 8-byte block depends on the result of the previous block • It gets harder to implement the “stateful” 64b/66b Encode & Decode on the wider data busses • With the Stateless encoder/decoder, this per-block dependency is removed • See opsasnick_3df_01a_221005.pdf • MTTFPA is acceptable with RS[544, 514] based interfaces • See opsasnick_3df_01a_2212.pdf • State-based protection relies on redundancy in the 66b sync header that does not exist with transcoding • RS[544, 514] give better protect now than state diagrams for interfaces without FEC • Current adoption of stateless 64b/66b encode/decode option • 802.3df adopted the stateless option for 800GbE PCS (CL 172) • 802.3dj also adopted the stateless option in the 1.6TbE PCS baseline • Stateless and State-based encoding/decoding are fully inter-operable • It is a device choice to implement either one IEEE P802.3dj July 2023 Plenary Meetings 4 https://www.ieee802.org/3/df/public/22_10/22_1005/opsasnick_3df_01a_221005.pdf https://www.ieee802.org/3/df/public/22_12/opsasnick_3df_01a_2212.pdf Background • 802.3df Draft 1.1, comment #42 • Suggested adding the stateless 64b/66b option to Clause 119 for all 200/400GBASE-R PHYs for commonality with the 800GBASE-R PCS • The 802.3df ballot resolution committee deemed general updates to Clause 119 to be “out of scope” • Only changes related to the PHYs/PMDs being added are in scope • 802.3df only adds a single new PHY (400GBASE-DR4-2) based on 100G/lane • For 802.3dj • All new PHYs/PMDs based on 200G/lane are in scope • Can now update Clause 119, 200/400G PCS, with respect to these new PHYs IEEE P802.3dj July 2023 Plenary Meetings 5 https://www.ieee802.org/3/df/comments/D1p1/8023df_D1p1_comments_final_clause.pdf#page=22 IEEE P802.3dj July 2023 Plenary Meetings 6 200GbE – 1.6TbE Implementations on 200G/lane • For 200 Gb/s per lane Interfaces • Breakout applications usually support all port speeds from 200GbE to 1.6TbE • PCS 64b/66b options • Baseline for 1.6TBASE-R PCS • Stateful or stateless • CL 172: 800GBASE-R PCS • Stateful or stateless • CL 119: 200/400GBASE-R PCS • Currently stateful only • For a common stateless 64b/66b Coding • Requires CL 119 changes to allow the stateless 64b/66b option for 200G/lane PHYs IEEE P802.3dj July 2023 Plenary Meetings 7 802.3df Draft 2.1, Stateless Encoder Rules IEEE P802.3dj July 2023 Plenary Meetings 8 802.3df Draft 2.1, Stateless Decoder Rules Summary • Suggested course of action • Specify stateless 64b/66b encode and decode as an option in Clause 119 • As defined in 802.3df D2.1 172.2.4.1.2 and 172.2.5.9.2 and shown on slides 7 and 8, for all 200G/lane PHY/PMDs • Allows for a single stateless 64b/66b design for common breakout applications • This option would not apply to PHY/PMDs not defined in 802.3dj which use Clause 119 • Does not affect 200GbE and 400GbE PHY/PMDs already defined (over 100G/lane or 50G/lane) • A straw poll is planned to gauge support IEEE P802.3dj July 2023 Plenary Meetings 9 Thank You Backup/Reference slides follow IEEE P802.3dj July 2023 Plenary Meetings 10 802.3 Figure 82-5: 64B/66B Block Formats IEEE P802.3dj July 2023 Plenary Meetings 11 • (D)ata Block • Sync=01 • (C)ontrol Block • Sync=10 • BT=0x1E or 0x4B • (S)tart Block • Sync=10 • BT=0x78 • (T)erminate Block • Sync=10 • BT=0x87, 0x99,0xAA,0xB4,0xCC, 0xD2,0xE1, or 0xFF • (E)rror Block • Anything else IEEE P802.3dj July 2023 Plenary Meetings 12 802.3 Figure 119-14: Transmit State Diagram • After Reset, the “normal flow” is: 1.

Besides 10 Gbps data busses running at 622 MHz or higher in each direction, SPI-4 supports additional status and control busses and associated clock signals in each data direction.

Stateless 64b/66b Encode/Decode • As port speeds get faster: • Internal busses must get wider as it is harder to increase the ASIC clock frequency • For Stateful 64b/66b coding, each 8-byte block depends on the result of the previous block • It gets harder to implement the “stateful” 64b/66b Encode & Decode on the wider data busses • With the Stateless encoder/decoder, this per-block dependency is removed • See opsasnick_3df_01a_221005.pdf • MTTFPA is acceptable with RS[544, 514] based interfaces • See opsasnick_3df_01a_2212.pdf • State-based protection relies on redundancy in the 66b sync header that does not exist with transcoding • RS[544, 514] give better protect now than state diagrams for interfaces without FEC • Current adoption of stateless 64b/66b encode/decode option • 802.3df adopted the stateless option for 800GbE PCS (CL 172) • 802.3dj also adopted the stateless option in the 1.6TbE PCS baseline • Stateless and State-based encoding/decoding are fully inter-operable • It is a device choice to implement either one IEEE P802.3dj July 2023 Plenary Meetings 4 https://www.ieee802.org/3/df/public/22_10/22_1005/opsasnick_3df_01a_221005.pdf https://www.ieee802.org/3/df/public/22_12/opsasnick_3df_01a_2212.pdf Background • 802.3df Draft 1.1, comment #42 • Suggested adding the stateless 64b/66b option to Clause 119 for all 200/400GBASE-R PHYs for commonality with the 800GBASE-R PCS • The 802.3df ballot resolution committee deemed general updates to Clause 119 to be “out of scope” • Only changes related to the PHYs/PMDs being added are in scope • 802.3df only adds a single new PHY (400GBASE-DR4-2) based on 100G/lane • For 802.3dj • All new PHYs/PMDs based on 200G/lane are in scope • Can now update Clause 119, 200/400G PCS, with respect to these new PHYs IEEE P802.3dj July 2023 Plenary Meetings 5 https://www.ieee802.org/3/df/comments/D1p1/8023df_D1p1_comments_final_clause.pdf#page=22 IEEE P802.3dj July 2023 Plenary Meetings 6 200GbE – 1.6TbE Implementations on 200G/lane • For 200 Gb/s per lane Interfaces • Breakout applications usually support all port speeds from 200GbE to 1.6TbE • PCS 64b/66b options • Baseline for 1.6TBASE-R PCS • Stateful or stateless • CL 172: 800GBASE-R PCS • Stateful or stateless • CL 119: 200/400GBASE-R PCS • Currently stateful only • For a common stateless 64b/66b Coding • Requires CL 119 changes to allow the stateless 64b/66b option for 200G/lane PHYs IEEE P802.3dj July 2023 Plenary Meetings 7 802.3df Draft 2.1, Stateless Encoder Rules IEEE P802.3dj July 2023 Plenary Meetings 8 802.3df Draft 2.1, Stateless Decoder Rules Summary • Suggested course of action • Specify stateless 64b/66b encode and decode as an option in Clause 119 • As defined in 802.3df D2.1 172.2.4.1.2 and 172.2.5.9.2 and shown on slides 7 and 8, for all 200G/lane PHY/PMDs • Allows for a single stateless 64b/66b design for common breakout applications • This option would not apply to PHY/PMDs not defined in 802.3dj which use Clause 119 • Does not affect 200GbE and 400GbE PHY/PMDs already defined (over 100G/lane or 50G/lane) • A straw poll is planned to gauge support IEEE P802.3dj July 2023 Plenary Meetings 9 Thank You Backup/Reference slides follow IEEE P802.3dj July 2023 Plenary Meetings 10 802.3 Figure 82-5: 64B/66B Block Formats IEEE P802.3dj July 2023 Plenary Meetings 11 • (D)ata Block • Sync=01 • (C)ontrol Block • Sync=10 • BT=0x1E or 0x4B • (S)tart Block • Sync=10 • BT=0x78 • (T)erminate Block • Sync=10 • BT=0x87, 0x99,0xAA,0xB4,0xCC, 0xD2,0xE1, or 0xFF • (E)rror Block • Anything else IEEE P802.3dj July 2023 Plenary Meetings 12 802.3 Figure 119-14: Transmit State Diagram • After Reset, the “normal flow” is: 1.

IEEE P802.3df Task Force - October 2022 6 Implications of Faster Port Speeds • As port speeds increase, implementations can either increase clock frequency or make data busses wider • It is getting harder to increase clock frequency to keep up with port speed increases • Data busses are most likely getting wider • As the internal PCS data bus gets wider, the 64B/66B encode/decode state machines are creating a longer logic path within a single cycle • Each 8-byte block must be encoded/decoded one at a time and influences the encoding of the following 8-byte block due to the CL 119 state diagrams. • With multiple 8-byte blocks within the PCS data bus, logic must propagate from the first 8-byte block all the way through to the last 8-byte block in a single cycle.

IEEE P802.3df Task Force - October 2022 6 Implications of Faster Port Speeds • As port speeds increase, implementations can either increase clock frequency or make data busses wider • It is getting harder to increase clock frequency to keep up with port speed increases • Data busses are most likely getting wider • As the internal PCS data bus gets wider, the 64B/66B encode/decode state machines are creating a longer logic path within a single cycle • Each 8-byte block must be encoded/decoded one at a time and influences the encoding of the following 8-byte block due to the CL 119 state diagrams. • With multiple 8-byte blocks within the PCS data bus, logic must propagate from the first 8-byte block all the way through to the last 8-byte block in a single cycle.

At the time the concept was of a bussed MII with multiple PHYs present, but only one active. 

Bohbot, Michel Booth, Brad Bottorff, Paul Bourque, Gary Bridgers, Vince Brown, Benjamin Buckman, Lisa Burton, Scott Busse, Robert Bynum, Roy Cam, Richard Campbell, Bob Carlson, Steve Chang, Edward G.

Bohbot, Michel Booth, Brad Bottorff, Paul Bourque, Gary Brewer, Steve Bridgers, Vince Brown, Benjamin Buckman, Lisa Busse, Robert Cam, Richard Campbell, Bob Chang, Edward G.

DB-8023.fp5 as of 3/11/2008IEEE 802.3 VOTERS (182) Abbas, Ghani Abbott, John Abbott, Justin Akasaka, Youichi Alping, Arne Anslow, Pete Barnette, Jim Barrass, Hugh Barrick, Scott Baumer, Howard Beaudoin, Denis Beia, Christian Bennett, Mike Booth, Brad Braun, Ralf-Peter Busse, Robert Cain, Jeff Carlson, Steve Carroll, J.

. • SMBus (or I2C) • SPI • These legacy busses while performing well for many years are a design challenge for baseboard management controllers (BMCs) especially from a SW perspective. • Many of the devices while claiming “compliance” require special drivers to operate properly 3 of 8 IEEE P802.3cg 10 Mbps Single Twisted Pair Ethernet Task Force Block Diagram – Current Architecture 4 of 8 IEEE P802.3cg 10 Mbps Single Twisted Pair Ethernet Task Force Proposed new architecture 5 of 8 IEEE P802.3cg 10 Mbps Single Twisted Pair Ethernet Task Force Other applications • I2C/SMBus/SPI driver issues continue to drive late issues in both server and switch designs.

IEEE 802.3 VOTERS (201) as of 10/31/2012 Abaye, Ali Abbas, Ghani Abbott, John Allard, Michel Amleshi, Peerouz Anderson, Jon Anslow, Peter Balasubramanian, Koussalya Baldwin, Thananya Barnett, Barry Barr, David Barrass, Hugh Beaudoin, Denis Belopolsky, Yakov Bennett, Michael Bhatt, Vipul Bhoja, Sudeep Bliss, William Booth, Brad Boyd, Edward Braun, Ralf-Peter Breuer, Dirk Brophy, Timothy Brown, Alan Brown, Kevin Brown, Matthew Bugg, Mark Busse, Robert Carlson, Steve Carroll, J.

Facility may include transformers, buss work, circuit breakers, capacitor banks, etc.

(Essentially the same product on three different busses) I would be grateful if the Reg.

Bhoja, Sudeep Bhugra, Harmeet Bonnamy, Jean-Michel Booth, Brad Braun, Ralf-Peter Brearley, Dave Brown, Kevin Brown, Matt Brownlee, Phillip Brunn, Brian Brunner, Robert Busse, Robert Cain, Jeff Carlson, Steve Chalupsky, David Chang, Frank Chang, Luke Chin, David Chopra, Rahul Claseman, George Cobb, Terry Cohen, Larry Collum, James Crepin, J.

He is survived by his wife of 61 years (my mom) Catherine Birch Rypinski, his brother, Richard Rypinski, two children (my sister Margaret Buss and myself), and three grandchildren.

Facility may include transformers, buss work, circuit breakers, capacitor banks, etc.

DB-8023.fp5 as of 11/2/2007IEEE 802.3 VOTERS (168) Abbas, Ghani Abbott, John Akasaka, Youichi Alping, Arne Anslow, Pete Barnette, Jim Barrass, Hugh Barrick, Scott Baumer, Howard Beaudoin, Denis Beck, Michaël Beia, Christian Bennett, Mike Booth, Brad Braun, Ralf-Peter Brearley, Dave Brunner, Robert Busse, Robert Cain, Jeff Carlson, Steve Carroll, J.

Hopefully I've gained a better understanding of busses, registers and deep pipes.

. • SMBus (or I2C) • SPI • These legacy busses while performing well for many years are a design challenge for baseboard management controllers (BMCs) especially from a SW perspective. • Many of the devices while claiming “compliance” require special drivers to operate properly 3 of 8 IEEE P802.3cg 10 Mbps Single Twisted Pair Ethernet Task Force Block Diagram – Current Architecture 4 of 8 IEEE P802.3cg 10 Mbps Single Twisted Pair Ethernet Task Force Proposed new architecture 5 of 8 IEEE P802.3cg 10 Mbps Single Twisted Pair Ethernet Task Force Other applications • I2C/SMBus/SPI driver issues continue to drive late issues in both server and switch designs.

DB-8023.fp5 as of 7/14/2007IEEE 802.3 VOTERS (149) Abbott, John Akasaka, Youichi Alping, Arne Anslow, Pete Barnette, Jim Barrass, Hugh Barrick, Scott Baumer, Howard Beaudoin, Denis Beck, Michaël Beia, Christian Bennett, Mike Booth, Brad Braun, Ralf-Peter Brearley, Dave Brown, Matt Brunner, Robert Busse, Robert Cain, Jeff Carlson, Steve Carroll, J.

DB-8023.fp5 as of 4/14/2007IEEE 802.3 VOTERS (170) Abbott, John Abler, Joe Ahmed, Taufique Akasaka, Youichi Alping, Arne Altman, Michael Anslow, Pete Babanezhad, Joseph N Barnette, Jim Barrass, Hugh Barrick, Scott Baumer, Howard Beaudoin, Denis Beck, Michaël Beia, Christian Bennett, Mike Booth, Brad Braun, Ralf-Peter Brearley, Dave Brown, Matt Brownlee, Phillip Brunner, Robert Busse, Robert Cain, Jeff Carlson, Steve Carroll, J.

IEEE 802.3 VOTERS (152) as of 5/13/2010 Abbas, Ghani Abbott, John Ambrose, Andrew Anderson, Jon Anslow, Peter Balasubramanian, Vittal Baldwin, Thananya Barnette, Jim Barrass, Hugh Beaudoin, Denis Beckwith, Jonathan Bennett, Michael Bergmann, Ernest Booth, Brad Braun, Ralf-Peter Breuer, Dirk Brown, Matthew Busse, Robert Carlson, Steve Carroll, J.